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Level 8 · Chapter 8.1

Transistors as switches

The device every gate is made of: the transistor as a voltage-controlled switch, nMOS and pMOS at the switch level, the road from relays and vacuum tubes to MOSFETs, and Moore's law checked against real chips — from the 4004's 2,300 transistors to the M2 Ultra's 134 billion.

The digital logic level treats a gate as a function: bits in, one bit out. This level opens the gate and finds the part that does the work. Every gate, every flip-flop, every bit of cache in a modern chip is built from one kind of device, used in one way: the transistor, working as a switch that one voltage turns on and off. This chapter looks at that switch — what it does, how it got here, and how many of them we can now put on a chip.

A switch controlled by a voltage

An ordinary light switch has two terminals and a lever. When the lever is down, the two terminals are connected and current flows; when it's up, they're disconnected. A transistor is the same thing with the lever replaced by a third terminal: a voltage on that terminal decides whether the other two are connected.

The transistors in every modern chip are MOSFETs (metal–oxide–semiconductor field-effect transistors). Their three terminals are:

TerminalRole
gatethe control input — the "lever"
sourceone end of the switch
drainthe other end

The gate is separated from the rest of the transistor by a thin insulating layer, so almost no current flows into it. The gate voltage acts at a distance, through an electric field, and either opens or closes a conducting channel between source and drain. How a MOSFET switches — why a field can make a sliver of silicon conduct — is the subject of the physics level. Here, we only need its behavior.

That behavior makes the transistor ideal for digital logic, for three reasons:

  • It's controlled by a voltage, and its output is a voltage. The output of one switch can drive the gates of the next ones directly, so switches can be chained into circuits of any depth.
  • The control input draws almost no current once it has been charged. A signal can drive many other gates.
  • It restores levels. A slightly weak 1 on the gate still turns the switch fully on, and the output is pulled all the way to the supply or to ground. Noise doesn't accumulate from gate to gate — the property the gates chapter relied on when it said that each gate outputs clean levels again.

Two kinds of switch: nMOS and pMOS

MOSFETs come in two complementary types, which behave as mirror images of each other:

TypeGate voltage that turns it onGood at pulling the output…Symbol in logic diagrams
nMOShigh (a logical 1)down to ground (0)plain gate
pMOSlow (a logical 0)up to the supply (1)gate with an inversion bubble

You can think of an nMOS transistor as a switch that closes when its gate is 1, and a pMOS transistor as a switch that closes when its gate is 0. The bubble in the pMOS symbol is the same inversion bubble as on a NAND gate: "active when low".

The second column matters as much as the first. An nMOS transistor passes a clean 0 but a degraded 1; a pMOS transistor passes a clean 1 but a degraded 0. That's why real gates use nMOS transistors to connect the output to ground and pMOS transistors to connect it to the supply, never the other way round. Using the two types together, each in its strong direction, is CMOS — complementary MOS — and it's the subject of the next chapter.

Put a pMOS transistor between the supply and the output, an nMOS transistor between the output and ground, and connect both gates to the input:

InputpMOS (to supply)nMOS (to ground)Output
0onoffconnected to supply: 1
1offonconnected to ground: 0

Two transistors, and the output is always the inverse of the input: a NOT gate. In either state one switch is open, so there is never a direct path from the supply to ground, and the gate draws current only while it switches. That single fact explains why CMOS won.

Relays, vacuum tubes and bipolar transistors

The transistor is the fourth kind of switch computers have been built from. Each one replaced the previous one because it was smaller, faster, more reliable and used less power.

SwitchEraControlled byWeakness
Relay1930s–1940sa current in an electromagnet, which moves a metal contactslow (milliseconds), mechanical wear
Vacuum tube1940s–1950sthe voltage on a grid between a hot cathode and an anodehot, power-hungry, filaments burn out
Bipolar transistor (BJT)1950s–1980sa small current into the basedraws current even when idle
MOSFET1970s–todaythe voltage on an insulated gate—

Konrad Zuse's Z3 (1941) computed with relays. ENIAC (1945) used about 18,000 vacuum tubes and had to be repaired constantly because tubes kept failing. The transistor was invented at Bell Labs in 1947, and the MOSFET, also at Bell Labs, in 1959. The integrated circuit — several transistors made together on one piece of semiconductor, wired up in place — came in 1958–1959, from Jack Kilby at Texas Instruments and Robert Noyce at Fairchild.

Tanenbaum's gate figure uses a bipolar transistor, whose three terminals are the collector, base and emitter, with a resistor pulling the output up to the supply. A current into the base turns it on. That's how the TTL and ECL logic families of the 1960s–1980s worked, and the book notes that MOS has "largely taken over". Today the takeover is complete: every processor, memory and flash chip is CMOS. Bipolar transistors survive in analog and radio circuits, where their current gain is useful. The resistor design has a cost the book doesn't dwell on: when the transistor is on, current flows through the resistor continuously, so the gate burns power just by holding a 0. With billions of gates, that's unaffordable; CMOS, which replaces the resistor with a second transistor, doesn't do it.

Gates from switches

Two switches in series conduct only if both are closed: that's AND. Two switches in parallel conduct if either is closed: that's OR. Everything else follows. With nMOS transistors connecting the output to ground:

  • In series, the output is pulled to 0 only when both inputs are 1. Otherwise it stays high. That's NAND.
  • In parallel, the output is pulled to 0 when either input is 1. That's NOR.

This is why NAND and NOR, not AND and OR, are the natural gates: a transistor pulling the output low inverts by nature. An AND gate is a NAND followed by an inverter.

Here are the three gates Tanenbaum builds from transistors — NOT, NAND and NOR — along with the others, at the logic level:

Logic · The gates that transistors build directly: NOT, NAND, NOR

Try it: Click an input switch in the circuit (or its button above) to toggle it — the gates and the truth table follow.

auto
0
gate delays
stable after 0
stable
state
1
critical path
gate delays, worst case
7
gates
ABNOT gate: output 11NOT AAND gate: output 00A AND BOR gate: output 00A OR BXOR gate: output 00A XOR BNAND gate: output 11A NAND BNOR gate: output 11A NOR BXNOR gate: output 11A XNOR B
1 0 inputs changed, output switches next delayclick a switch to toggle it
ABNOT AA AND BA OR BA XOR BA NAND BA NOR BA XNOR B
001000111
011011100
100011100
110110001

Every basic gate fed by the same two switches. Toggle A and B and watch the truth table follow. NAND and NOR are universal: every other gate can be built from either one.

Unit-delay model: every gate takes one step to react. With auto off, toggle switches and press step to watch the change travel gate by gate.

Tanenbaum counts two transistors for a NAND or NOR and three for an AND or OR, because in his bipolar circuits the pull-up is a resistor. In CMOS, the resistor becomes a network of pMOS transistors, and the counts double: a 2-input NAND or NOR takes 4 transistors, and AND or OR take 6. The next chapter builds each one.

Voltages and speeds, then and now

The book gives two numbers that have aged. It says CMOS chips run on "the neighborhood of +1.5 volts". Supply voltages have kept falling since: the cores of current processors typically run at around 1 volt or less, and the voltage changes constantly as the chip adjusts its speed to the load. Lower voltage means less energy per switch, as the next chapter will compute.

The book also says a transistor switches in "a nanosecond or less", and elsewhere that gate delays are "100s of picoseconds to a few nanoseconds". That was generous even in 2013. A processor clocked at 3 GHz has a cycle of 333 picoseconds, and one pipeline stage must fit a dozen or more gate levels into that cycle, so each gate must switch in a few tens of picoseconds at most. In one nanosecond, a modern core now goes through three clock cycles and can complete several instructions.

Moore's law

In 1965, Gordon Moore, then at Fairchild, noticed that the number of components on the most cost-effective chip was doubling every year, and predicted it would continue for a decade. In 1975 he revised the rate to a doubling every two years. The observation became known as Moore's law.

Tanenbaum writes that Moore's law "is often expressed" as a doubling every 18 months. It often is, but that's not what Moore said: the 18-month figure is usually attributed to Intel's David House, and it was about performance, which grew faster than transistor count because transistors were also getting faster. We can check which rate the chips actually followed:

ChipYearTransistors
Intel 40041971about 2,300
Apple M2 Ultra2023134 billion (Apple's figure)

134 × 10⁹ / 2,300 ≈ 5.8 × 10⁷, which is 2 raised to the power 25.8. So in 52 years the transistor count doubled 25.8 times: once every 2.02 years. Moore's two-year rate fits almost perfectly. A doubling every 18 months would have meant 34.7 doublings, about 60 trillion transistors on one chip — more than 450 times what we got. The book's "60 percent increase per year" is the 18-month rate (2^(12/18) ≈ 1.59); the two-year rate is 41 percent per year (√2 ≈ 1.41).

Two cautions about that comparison. First, the M2 Ultra isn't one piece of silicon: it's two M2 Max dies joined in one package by Apple's UltraFusion connection. Chips are increasingly assembled from several dies, as the chapter from sand to chips explains, which is one way the industry keeps the curve going. Second, Moore's law was never a law of physics. It's an economic observation about how fast the industry can shrink transistors while keeping the cost per transistor falling, and it has been slowing: the cost per transistor has fallen much less at recent process generations than it used to.

What ended earlier is Dennard scaling, the rule that as transistors shrink, their voltage and current shrink with them, so power per area stays constant. It broke down in the mid-2000s, when voltages could no longer drop much without transistors leaking too much current when off. Since then, clock speeds have stayed roughly flat at a few gigahertz, and the extra transistors have gone into more cores, larger caches, GPUs and specialized units instead — the story of the multicore chapter at the microarchitecture level. The physics level's chapter on the limits of computing explains why leakage grows as devices shrink.

What 134 billion switches are for

On the M2 Ultra this chapter was written on, sysctl reports 24 CPU cores and system_profiler a 60-core GPU. A large share of the 134 billion transistors isn't logic at all, but memory. Every bit of SRAM cache is a cell of six transistors: two cross-coupled inverters that hold the bit — the latch from the flip-flops chapter, at transistor level — plus two access switches. sysctl shows four clusters of four performance cores sharing 16 MiB of L2 cache each, and two clusters of efficiency cores with 4 MiB each: 72 MiB of L2. At 8,388,608 bits per MiB and six transistors per bit, that's 72 × 8,388,608 × 6 ≈ 3.6 billion transistors in the L2 data cells alone, before tags, control, the L1 caches and the GPU's memories. The rest is GPU shader cores, the neural engine, media encoders, memory controllers, and the CPU cores themselves.

All of it is the same switch, repeated. The gate at the top of this page and the 134 billionth transistor of the M2 Ultra differ in size and speed, but not in what they do.

Takeaways

  • A transistor is a switch whose gate voltage connects or disconnects its source and drain. The gate draws almost no current, and the output of one switch can drive others, so switches chain into circuits of any size.
  • nMOS conducts when its gate is 1 and passes a strong 0; pMOS conducts when its gate is 0 and passes a strong 1. Using both, each in its strong direction, is CMOS.
  • Computers have been built from relays, vacuum tubes, bipolar transistors and now MOSFETs. The book's resistor-based bipolar gates wasted power holding a 0; CMOS doesn't.
  • Switches in series make AND, in parallel make OR; pulling the output down inverts, so NAND and NOR come naturally. In CMOS they take 4 transistors, not the book's 2.
  • Tanenbaum's figures are dated: supplies are now around 1 V or less, not 1.5 V, and gates switch in tens of picoseconds, not a nanosecond.
  • Moore's law is a doubling every two years, not 18 months: from the 4004 (about 2,300 transistors, 1971) to the M2 Ultra (134 billion, 2023) is 25.8 doublings in 52 years. Dennard scaling ended in the mid-2000s, which is why clock speeds stopped rising.

In this level

  1. 8.1Transistors as switches
  2. 8.2Building gates from CMOS
  3. 8.3From sand to chips
  4. 8.4Hard disks, SSDs and RAID
  5. 8.5Optical discs and tape
  6. 8.6Keyboards, displays, printers and cameras
  7. 8.7From modems to Ethernet: sending bits over a wire